Variable Threshold MOSFET Approach (Through Dynamic Threshold MOSFET) For Universal Logic Gates

 

Author :  K. Ragini, M. Satyam and B. C. Jinaga

Affiliation :  G. Narayanamma Institute of Technology & Science

Country :  India

Category :  Embedded Systems

Volume, Issue, Month, Year :  1, 1, March, 2010

Abstract :

In this article, we proposed a Variable threshold MOSFET(VTMOS)approach which is realized from Dynamic Threshold MOSFET(DTMOS), suitable for sub-threshold digital circuit operation. Basically the principle of sub- threshold logics is operating MOSFET in sub-threshold region and using the leakage current in that region for switching action, there by drastically decreasing power .To reduce the power consumption of sub-threshold circuits further, a novel body biasing technique termed VTMOS is introduced .VTMOS approach is realized from DTMOS approach. Dynamic threshold MOS (DTMOS) circuits provide low leakage and high current drive, compared to CMOS circuits,

Keyword :  Sub- threshold, Dynamic threshold MOS Inverter, Propagation delay, Noise-margin, Variable threshold MOS Inverter, Power dissipation.

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